MODULE RCmp;
(* Real comparison regression test: < > <= >= must emit D5
   (0D5H); they once emitted bare stack juggling, leaving operand
   bits as the boolean (negative-vs-zero failures). ExitCode = 31:
   bits 0-4 for the five true comparisons, none of the 64..4096
   false-positive bits. *)
VAR ExitCode : INTEGER;
    a, b, c, d, e, f, g, h, i, j, k, l : REAL;
BEGIN
  a := -1.0; b := 0.0;
  c := 0.0; d := -1.0;
  e := -1.0; f := -1.0;
  g := 0.0; h := 0.0;
  i := -1.0; j := 0.0;
  k := i * j;
  l := 0.0;
  ExitCode := 0;
  IF a < b THEN ExitCode := ExitCode + 1 END;
  IF c > d THEN ExitCode := ExitCode + 2 END;
  IF e = f THEN ExitCode := ExitCode + 4 END;
  IF g = h THEN ExitCode := ExitCode + 8 END;
  IF k = l THEN ExitCode := ExitCode + 16 END;
  IF a > b THEN ExitCode := ExitCode + 32 END;
  IF a = b THEN ExitCode := ExitCode + 64 END;
  IF c < d THEN ExitCode := ExitCode + 128 END;
  IF c = d THEN ExitCode := ExitCode + 256 END;
  IF e < f THEN ExitCode := ExitCode + 512 END;
  IF e > f THEN ExitCode := ExitCode + 1024 END;
  IF k < l THEN ExitCode := ExitCode + 2048 END;
  IF k > l THEN ExitCode := ExitCode + 4096 END
END RCmp.