# V3 step 3 — composites with length-prefixed layout (planned)

Status: not started.

## Scope (locked memory rule)

Every `ARRAY` = inline `LONGCARD` element count + packed elements;
all arrays incl. fixed; each multi-dim level has its own header;
records include headers in field offsets; `SYSTEM.TSIZE` covers
the header; open formals = single descriptor pointer.

- `ARRAY [lo..hi]`, multi-dim, `RECORD`, `SET`, `POINTER`,
  `NIL`, whole-array `:=` (equal counts else `Trap.RangeFault`),
  `HIGH/LEN` (static for fixed, header read for open),
  index lowering `base+8+(i-lo)*elemSize` + bounds check.
- `SymTab`: `ElemSize` replaces slot counting; `TypeSlots` retired.
- `Trap` module introduced (range/NIL faults).

## Acceptance (planned)

Layout tests (§5 of plan.md: fixed header bytes, nested headers,
record offsets, open-formal HIGH, mismatched-assign trap,
`SYSTEM.BYTE` I/O round-trip); suite green.

## Files (planned)

- `compiler/src/M2.atg` § types growth; `QbeGen` aggregate emission
  (`data $n = { l count, ... }`); `runtime/syslib/Trap`.
- This file filled in on landing.